MOHIT MUDGIL
I am about to complete my M.Tech in Electronics and Communication.
Monday, 3 March 2014
Saturday, 21 September 2013
Open this link for " error probability for CDMA" page 13-23http://www.tlc-networks.polito.it/oldsite/UPS3/interference_study.pdf
Spreading Code Acquisition and
Tracking
In
spread spectrum, at the sender side, we spread the signal and at the receiver
side we despread the signal. We need the timing information of the transmitted
signal in order to despread the received signal and demodulate the despread
signal. Therefore, the process of acquiring the timing information of the
transmitted spread spectrum signal is essential to the implementation of any
form of spread spectrum technique.
Usually
the problem of timing acquisition is solved via a two-step approach:
1) Initial
code acquisition (coarse
acquisition or coarse synchronization) which synchronizes the transmitter and
receiver to within an uncertainty of T
2) Code
tracking which performs
and maintains fine synchroniation between the transmitter and receiver.
Given
the initial acquisition, code tracking is a relatively easy task and is usually
accomplished by a delay lock loop (DLL). The tracking loop keeps on operating
during the whole communication period. If the channel changes abruptly, the
delay lock loop will lose track of the correct timing and initial acquisition
will be re-performed. Sometimes, we perform initial code acquisition
periodically no matter whether the tracking loop loses track or not. Compared
to code tracking, initial code acquisition in a spread spectrum system is
usually very difficult.
Initial Code Acquisition
The
objective of initial code acquisition is to achieve a coarse synchronization
between the receiver and the transmitted signal The receiver
hypothesizes a phase of the spreading sequence and attempts to despread the
received signal using the hypothesized phase. If the hypothesized phase matches
the sequence in the received signal, the wide-band spread spectrum signal will
be despread correctly to give a narrowband data signal. Then a bandpass filter,
with a bandwidth similar to that of the narrowband data signal, can be employed
to collect the power of the despread signal. Since the hypothesized phase
matches the received signal, the BPF will collect all the power of the despread
signal. In this case, the receiver decides a coarse synchronization has been
achieved and activates the tracking loop to perform fine synchronization. On the
other hand, if the hypothesized phase does not match the received signal, the despreader
will give a wideband output and the BPF will only be able to collect a small
portion of the power of the despread signal. Based on this, the receiver
decides this hypothesized phase is incorrect and other phases should be tried.
Code Tracking
The
purpose of code tracking is to perform and maintain fine synchronization. A code
tracking loop starts its operation only after initial acquisition has been
achieved. Hence, we can assume that we are off by small amounts in both
frequency and code phase. A common fine synchronization strategy is to design a
code tracking circuitry which can track the code phase in the presence of a
small frequency error. After the correct code phase is acquired by the code
tracking circuitry, a standard phase lock loop (PLL) can be employed to track
the carrier frequency and phase. In this section, we give a brief introduction
to a common technique for code tracking, namely, the early-late gate delay-lock
loop (DLL)
We
assume that the data signal is of constant envelope (e.g., BPSK) and the period
of the spreading signal is equal to the symbol duration T . We choose the
lowpass filter to have bandwidth similar
to that of the data signal
Since
the data signal b(t) is of constant envelope, the samples of the signal x1(t)
at time t = (nT + ) for any integer n will be:
Between the samples, the signal x1(t)
fluctuates about the constant value given in. Similarly,
The
difference signal x2(t)-x1(t) is then passed through the loop filter which is
basically designed to output the d.c. value of its input. As a result, the
error signal
This
error signal can be used to control a VCO which derives the local code
generator.
Wednesday, 11 September 2013
INSTRUCTION SET OF 8086 MICROPROCESSOR
Instructions:
adc Add with carry flag
Syntax: adc dest, src
dest: memory or register
src:
memory, register, or immediate
Action: dest = dest + src + CF
Flags Affected: OF, SF, ZF, AF, PF, CF
Notes: This instruction is used to perform
32-bit addition.
add Add two numbers
Syntax: add dest, src
dest: register or memory
src: register, memory, or immediate
Action: dest = dest + src
Flags Affected: OF, SF, ZF, AF, PF, CF
Notes: Works for both signed and unsigned
numbers.
and Bitwise logical AND
Syntax: and dest, src
dest: register or memory
src: register, memory, or immediate
Action: dest = dest & src
Flags Affected: OF=0, SF, ZF, AF=?, PF, CF=0
call Call procedure or function
Syntax: call addr
addr: register, memory, or immediate
Action: Push IP onto stack, set IP to addr.
Flags Affected: None
cbw Convert byte to word (signed)
Syntax: cbw
Action: Sign extend AL to create a word in
AX.
Flags Affected: None
Notes: For unsigned numbers use "mov ah,
0".
cli Clear interrupt flag (disable interrupts)
Syntax: cli
Action: Clear IF
Flags Affected: IF=0
cmp Compare two operands
Syntax: cmp op1, op2
op1: register or memory
op2: register, memory, or immediate
Action: Perform op1-op2, discarding the
result but setting the flags.
Flags Affected: OF, SF, ZF, AF, PF, CF
Notes: Usually used before a conditional jump
instruction.
cwd Convert word to doubleword (signed)
Syntax: cwd
Action: Sign extend AX to fill DX, creating a
dword contained in DX::AX.
Flags Affected: None
Notes: For unsigned numbers use "xor dx,
dx" to clear DX.
dec Decrement by 1
Syntax: dec op
op: register or memory
Action: op = op - 1
Flags Affected: OF, SF, ZF, AF, PF
div Unsigned divide
Syntax: div op8
div op16
op8: 8-bit register or memory
op16: 16-bit register or memory
Action: If operand is op8, unsigned AL = AX /
op8 and
AH = AX % op8
If operand is op16, unsigned AX =
DX::AX / op16 and DX = DX::AX % op16
Flags Affected: OF=?, SF=?, ZF=?, AF=?, PF=?,
CF=?
Notes: Performs both division and modulus
operations in one instruction.
idiv Signed divide
Syntax: idiv op8
idiv op16
op8: 8-bit register or memory
op16: 16-bit register or memory
Action: If operand is op8, signed AL = AX /
op8 and
AH = AX % op8
If operand is op16, signed AX =
DX::AX / op16 and DX = DX::AX % op16
Flags Affected: OF=?, SF=?, ZF=?, AF=?, PF=?,
CF=?
Notes: Performs both division and modulus
operations in one instruction.
imul Signed multiply
Syntax: imul op8
imul op16
op8: 8-bit register or memory
op16: 16-bit register or memory
Action: If operand is op8, signed AX = AL *
op8
If operand is op16, signed DX::AX =
AX * op16
Flags Affected: OF, SF=?, ZF=?, AF=?, PF=?,
CF
in Input (read) from port
Syntax: in AL, op8
in AX, op8
op8: 8-bit immediate or DX
Action: If destination is AL, read byte from
8-bit port op8.
If destination is AX, read word from
16-bit port op8.
Flags Affected: None
inc Increment by 1
Syntax: inc op
op: register or memory
Action: op = op + 1
Flags Affected: OF, SF, ZF, AF, PF
int Call to interrupt procedure
Syntax: int imm8
imm8: 8-bit unsigned immediate
Action: Push flags, CS, and IP; clear IF and
TF (disabling interrupts); load
word at address (imm8*4) into IP and
word at (imm8*4 + 2) into CS.
Flags Affected: IF=0, TF=0
Notes: This instruction is usually used to
call system routines.
iret Interrupt return
Syntax: iret
Action: Pop IP, CS, and flags (in that
order).
Flags Affected: All
Notes: This instruction is used at the end of
ISRs.
j?? Jump if ?? condition met
Syntax: j?? rel8
rel8: 8-bit signed immediate
Action: If condition ?? met, IP = IP + rel8
(sign extends rel8)
Flags Affected: None
Notes: Use the cmp instruction to compare two
operands then j?? to jump
conditionally. The ?? of the
instruction name represents the jump
condition, allowing for following
instructions:
ja jump
if above, unsigned >
jae
jump if above or equal, unsigned >=
jb jump
if below, unsigned <
jbe jump
if below or equal, unsigned <=
je jump
if equal, ==
jne jump
if not equal, !=
jg jump
if greater than, signed >
jge jump
if greater than or equal, signed >=
jl jump
if less than, signed <
jle jump
if less than or equal, signed <=
All of the ?? suffixes can also be of
the form n?? (e.g., jna for
jump if not above). See 8086
documentation for many more ?? conditions.
An assembler label should be used in
place of the rel8 operand. The
assembler will then calculate the
relative distance to jump.
Note also that rel8 operand greatly
limits conditional jump distance
(-127 to +128 bytes from IP). Use the
jmp instruction in combination
with j?? to overcome this barrier.
jmp Unconditional jump
Syntax: jump rel
jump op16
jump seg:off
rel: 8 or 16-bit signed immediate
op16: 16-bit register or memory
seg:off: Immediate 16-bit segment and 16-bit
offset
Action: If operand is rel, IP = IP + rel
If operand is op16, IP = op16
If operand is seg:off, CS = seg, IP =
off
Flags Affected: None
Notes: An assembler label should be used in
place of the rel8 operand. The
assembler will then calculate the
relative distance to jump.
lea Load effective address offset
Syntax: lea reg16, memref
reg16: 16-bit register
memref: An effective memory address (e.g.,
[bx+2])
Action: reg16 = address offset of memref
Flags Affected: None
Notes: This instruction is used to easily
calculate the address of data in
memory. It does not actually access
memory.
mov Move data
Syntax: mov dest, src
dest: register or memory
src: register, memory, or immediate
Action: dest = src
Flags Affected: None
mul Unsigned multiply
Syntax: mul op8
mul op16
op8: 8-bit register or memory
op16: 16-bit register or memory
Action: If operand is op8, unsigned AX = AL *
op8
If operand is op16, unsigned DX::AX =
AX * op16
Flags Affected: OF, SF=?, ZF=?, AF=?, PF=?,
CF
neg Two's complement negate
Syntax: neg op
op: register or memory
Action: op = 0 - op
Flags Affected: OF, SF, ZF, AF, PF, CF
nop No operation
Syntax: nop
Action: None
Flags Affected: None
not One's complement negate
Syntax: not op
op: register or memory
Action: op = ~op
Flags Affected: None
or Bitwise logical OR
Syntax: or dest, src
dest: register or memory
src: register, memory, or immediate
Action: dest = dest | src
Flags Affected: OF=0, SF, ZF, AF=?, PF, CF=0
out Output (write) to port
Syntax: out op, AL
out op, AX
op: 8-bit immediate or DX
Action: If source is AL, write byte in AL to
8-bit port op.
If source is AX, write word in AX to
16-bit port op.
Flags Affected: None
pop Pop word from stack
Syntax: pop op16
reg16: 16-bit register or memory
Action: Pop word off the stack and place it
in op16 (i.e., op16 = [SS:SP]
then SP = SP + 2).
Flags Affected: None
Notes: Pushing and popping of SS and SP are
allowed but strongly discouraged.
popf Pop flags from stack
Syntax: popf
Action: Pop word from stack and place it in
flags register.
Flags Affected: All
push Push word onto stack
Syntax: push op16
op16: 16-bit register or memory
Action: Push op16 onto the stack (i.e., SP =
SP - 2 then [SS:SP] = op16).
Flags Affected: None
Notes: Pushing and popping of SS and SP are
allowed but strongly discouraged.
pushf Push flags onto stack
Syntax: pushf
Action: Push flags onto stack as a word.
Flags Affected: None
ret Return from procedure or function
Syntax: ret
Action: Pop word from stack and place it in
IP.
Flags Affected: None
sal Bitwise arithmetic left shift (same as shl)
Syntax: sal op, 1
sal op, CL
op: register or memory
Action: If operand is 1, op = op << 1
If operand is CL, op = op << CL
Flags Affected: OF, SF, ZF, AF=?, PF, CF
sar Bitwise arithmetic right shift (signed)
Syntax: sar op, 1
sar op, CL
op: register or memory
Action: If operand is 1, signed op = op
>> 1 (sign extends op)
If operand is CL, signed op = op
>> CL (sign extends op)
Flags Affected: OF, SF, ZF, AF=?, PF, CF
sbb Subtract with borrow
Syntax: sbb dest, src
dest: register or memory
src: register, memory, or immediate
Action: dest = dest - (src + CF)
Flags Affected: OF, SF, ZF, AF, PF, CF
Notes: This instruction is used to perform
32-bit subtraction.
shl Bitwise left shift (same as sal)
Syntax: shl op, 1
shl op, CL
op: register or memory
Action: If operand is 1, op = op << 1
If operand is CL, op = op << CL
Flags Affected: OF, SF, ZF, AF=?, PF, CF
shr Bitwise right shift (unsigned)
Syntax: shr op, 1
shr op, CL
op: register or memory
Action: If operand is 1, op = (unsigned)op
>> 1
If operand is CL, op = (unsigned)op
>> CL
Flags Affected: OF, SF, ZF, AF=?, PF, CF
sti Set interrupt flag (enable interrupts)
Syntax: sti
Action: Set IF
Flags Affected: IF=1
sub Subtract two numbers
Syntax: sub dest, src
dest: regsiter or memory
src: register, memory, or immediate
Action: dest = dest - src
Flags Affected: OF, SF, ZF, AF, PF, CF
Notes: Works for both signed and unsigned
numbers.
test Bitwise logical compare
Syntax: test op1, op2
op1: register, memory, or immediate
op2: register, memory, or immediate
Action: Perform op1 & op2, discarding the
result but setting the flags.
Flags Affected: OF=0, SF, ZF, AF=?, PF, CF=0
Notes: This instruction is used to test if
bits of a value are set.
xor Bitwise logical XOR
Syntax: xor dest, src
dest: register or memory
src: register, memory, or immediate
Action: dest = dest ^ src
Flags Affected: OF=0, SF, ZF, AF=?, PF, CF=0
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